Computing in Heterogeneous, Autonomous 'N' Goal-oriented Environments
Imagine a revolutionary computing system that can observe its own execution and optimize its behavior with respect to the external environment, to the user and to the applications demands. Provide users with the possibility to specify their desired goals along with constraints in terms of energy budget, time, and computational accuracy. Design a computing chip performing better, according to a set of goals expressed by the user, the longer it runs an application.

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Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration
Reconfigurable logic allows the definition of new functions to be implemented in dynamically instantiated hardware units, combining adaptivity with hardware speed and efficiency. FASTER will facilitate the use of reconfigurable technology by providing a complete methodology that enables designers to easily implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigurable technology.

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